 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| NAND256-M NAND512-M, NAND01G-M 256/512Mb/1Gb (x8/x16, 1.8/3V, 528 Byte Page) NAND Flash Memories + 256/512Mb (x16/x32, 1.8V) LPSDRAM, MCP Features Multi-Chip Packages - 1 die of 256 Mb, 512 Mb (x8/ x16) NAND Flash + 1 die of 256 Mb (x16) SDR LPSDRAM - 1 die of 256 Mb, 512 Mb (x8/ x16) NAND Flash + 2 dice of 256 Mb (x16) SDR LPSDRAMs - 1 die of 256 Mb, 512 Mb (x8/ x16) NAND Flash +1 die of 256 Mb (x16) DDR LPSDRAM - 1 die of 512 Mb (x16) NAND Flash + 1 die of 256 Mb or 512 Mb (x16) DDR LPSDRAM Supply voltages - VDDF = 1.7V to 1.95V or 2.5V to 3.6V - VDDD = VDDQD = 1.7V to 1.9V Electronic Signature ECOPACK(R) packages Temperature range - -30 to 85C FBGA TFBGA107 10.5 x 13 x 1.2mm TFBGA149 10 x 13.5 x 1.2mm LFBGA137 10.5 x 13 x 1.4mm TFBGA137 10.5 x 13 x 1.2 mm(1) (1) Preliminary specifications. Fast Block Erase - Block erase time: 2ms (typ) Status Register Data integrity - 100,000 Program/Erase cycles - 10 years Data Retention Flash Memory NAND Interface - x8 or x16 bus width - Multiplexed Address/ Data Page size - x8 device: (512 + 16 spare) Bytes - x16 device: (256 + 8 spare) Words Block size - x8 device: (16K + 512 spare) Bytes - x16 device: (8K + 256 spare) Words Page Read/Program - Random access: 15s (max) - Sequential access: 50ns (min) - Page program time: 200s (typ) Copy Back Program mode - Fast page copy without external buffering LPSDRAM Interface: x16 or x 32 bus width Deep Power Down mode 1.8v LVCMOS interface Quad internal Banks controlled by BA0 and BA1 Automatic and controlled Precharge Auto Refresh and Self Refresh - 8,192 Refresh cycles/64ms - Programmable Partial Array Self Refresh - Auto Temperature Compensated Self Refresh Wrap sequence: sequential/interleave Burst Termination by Burst Stop command and Precharge command August 2006 Rev 5 1/23 www.st.com 2 NAND256-M, NAND512-M, NAND01G-M Table 1. Reference Product List Part Number NAND256R3M0 NAND Product 256 Mbit (x8), 1.8V 256Mbit (x16) 1.8V 256Mbit (x16) 3V LPSDRAM Product 256 Mbit SDR, (x16), 1.8V, 104MHz 256 Mbit DDR (x16) 1.8V, 133MHz 256 Mbit SDR (x16), 1.8V, 104MHz 256 Mbit SDR (x16), 1.8V, 104MHz 512 Mbit (x8), 1.8V 256 Mbit DDR (x16) 1.8V, 133MHz 512 Mbit DDR (x16) 1.8V, 133MHz 512Mbit (x8) 3V 2 x 512Mbit NAND (x8) 3V 512Mbit SDR (2x16) (2x256Mbit SDR x16) 1.8V,104Mhz 512 Mbit SDR (2x16) (2 x 256Mbit SDR x16) 1.8V, 104MHz 512Mbit SDR (x32) 1.8V, 133MHz Package TFBGA107 TFBGA149 TFBGA149 TFBGA107 TFBGA149 TFBGA149 LFBGA 137 LFBGA137 TFBGA137 NAND256-M NAND256R4M3 NAND256W3M4 NAND512R3M0 NAND512R4M3 NAND512-M NAND512R4M5 NAND512W3M2 NAND01G-M NAND01GW3M2 1 Gbit NAND (x8) 3V 2/23 NAND256-M, NAND512-M, NAND01G-M Contents Contents 1 Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 NAND Flash Component . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 LPSDRAM Component . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 3 4 5 Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Package Mechanical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Part Numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 3/23 List of tables NAND256-M, NAND512-M, NAND01G-M List of tables Table 1. Table 2. Table 3. Table 4. Table 5. Table 6. Table 7. Table 8. Table 9. Table 10. Table 11. Product List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Signal Names: NAND Flash & 1 x SDR LPSDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Signal Names: NAND Flash & 2 x SDR LPSDRAMs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Signal Names - NAND Flash & DDR LPSDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 TFBGA107 10.5x13mm - 10x14 active ball array, 0.80mm pitch, Mechanical Data. . . . . . 17 TFBGA149 10x13.5mm - 12x16 active ball array, 0.80mm pitch, Mechanical Data. . . . . . 18 LFBGA137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- Mechanical Data. . . . . . . 19 TFBGA137 10.5x13mm - 10x13 active ball array, 0.80mm pitch . . . . . . . . . . . . . . . . . . . . 20 Ordering Information Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 4/23 NAND256-M, NAND512-M, NAND01G-M List of figures List of figures Figure 1. Figure 2. Figure 3. Figure 4. Figure 5. Figure 6. Figure 7. Figure 8. Figure 9. Figure 10. Logic Diagram: NAND Flash & 1 x SDR LPSDRAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Logic Diagram: NAND Flash & 2 x SDR LPSDRAMs. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Logic Diagram: NAND Flash & DDR LPSDRAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 TFBGA107 Connections (Top view through package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 TFBGA149 Connections (Top view through package) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 LFBGA137 and TFBGA137 Connections (Top view through package) . . . . . . . . . . . . . . . 15 TFBGA107 10.5x13mm - 10x14 active ball array, 0.80mm pitch, Bottom Outline . . . . . . . 17 TFBGA149 10x13.5mm - 12x16 active ball array, 0.80mm pitch, Bottom Outline . . . . . . . 18 LFBGA137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- Bottom Outline . . . . . . . . 19 TFBGA137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- Bottom Outline . . . . . . . . 20 5/23 Summary description NAND256-M, NAND512-M, NAND01G-M 1 Summary description The NAND256-M, NAND512-M and NAND01G-M are Multi-Chip Packages which combine up to 512 Mbit LPSDRAM with a 256 Mbit, 512 Mbit or 1 Gbit NAND Flash memory. This combination of LPSDRAM and NAND Flash can result in up to 1 Gbit of memory. The NAND Flash memory and LPSDRAM components have separate power supplies and grounds. They also have separate control, address and input/output signals, which allows simultaneous access to both devices at any moment. They are distinguished by two chip enable inputs: EF for the NAND Flash memory and ED for the LPSDRAM. See Figure 1: Logic Diagram: NAND Flash & 1 x SDR LPSDRAM and Table 2: Signal Names: NAND Flash & 1 x SDR LPSDRAM for an overview of the signals attached to each component. The NAND256-M, NAND512-M and NAND01G-M are available with a 1.8 or 3V voltage supply. See Table 1: Product List for a complete list of the products available. The devices are offered in the following Multi-Chip packages: TFBGA107 (10.5 x 13 x 1.2mm) LFBGA137 (10.5 x 13 x 1.4mm) TFBGA149 (10 x 13.5 x 1.2mm) TFBGA137 (10.5 x 13 x 1.2mm) In order to meet environmental requirements, ST offers the NAND256-M, NAND512-M and NAND01G-M devices in ECOPACK(R) package. ECOPACK packages are Lead-free. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. ECOPACK is an ST trademark. The memories are supplied with all the NAND Flash memory bits erased (set to `1'). This datasheet should be read in conjunction with the NAND Flash and LPSDRAM datasheets. NAND Flash Component The NAND256-M, NAND512-M and NAND01G-M devices contain a 1.8V, 256 Mbit or 512 Mbit, x8 528 Byte Page or x16 264 Word Page, NAND Flash memory with the Chip Enable Don't Care option. For detailed information on how to use the devices, see the NANDxxx-A and NAND01GWxA2B-KGD datasheets. 6/23 NAND256-M, NAND512-M, NAND01G-M Summary description LPSDRAM Component The NAND256-M and NAND512-M devices contain either: one M65KA256AL: 256Mbit (x16) Single Data Rate (SDR) LPSDRAM two M65KA256AL: 256Mbit (x16) Single Data Rate (SDR) LPSDRAMs (SDR0 and SDR1) one M65KG256AF: 256Mbit (x16) Double Data Rate (DDR) LPSDRAM one M65KG512AB: 512Mbit (x16) Double Data Rate (DDR) LPSDRAM one M65KC512AB: 512Mbit (x32) Single Data Rate (SDR) LPSDRAM Refer to Table 1: Product List, for a description of the memories contained in the NAND256M, NAND256-M and NAND01G-M devices. For detailed information on how to use the SDR LPSDRAM devices, refer to the M65KA256AL and M65KC512AB datasheets which are available from your local STMicroelectronics distributor. For detailed information on how to use the DDR LPSDRAM device, refer to the M65KG256AB datasheet which is available from your local STMicroelectronics distributor. Figure 1. Logic Diagram: NAND Flash & 1 x SDR LPSDRAM VDDQD VDDD VDDF 13 A0-A12 2 BA0-BA1 I/O8-I/O15, x16 EF R WF AL CL WP K KE ED WD RAS CAS DQM0 DQM1 RB NAND256-M NAND512-M NAND01G-M 16 DQ0-DQ15 8/16 I/O0-I/O7, x8/x16 VSSQD VSSD VSSF Ai11024b 7/23 Summary description Table 2. I/O0-I/O7 I/O8-I/O15 AL CL EF R RB WF WP VDDF VSSF NAND256-M, NAND512-M, NAND01G-M Signal Names: NAND Flash & 1 x SDR LPSDRAM NAND Flash Data Inputs/Outputs for x8 devices Data Inputs/Outputs for x16 devices Address Latch Enable Command Latch Enable Chip Enable Read Enable Ready/Busy (open-drain output) Write Enable Write Protect Supply Voltage Ground SDR LPSDRAM A0-A12 BA0-BA1 DQ0-DQ15 K KE ED WD RAS CAS DQM0 DQM1 VDDD VDDQD VSSD VSSQD Row Address: RA0-RA11 Column Address: CA0-CA8 Auto-precharge flag: A10 Bank Address Data Inputs/Outputs Clock Input Clock Enable Input Chip Select inputs Write Enable Input Row Address Strobe Input Column Address Strobe Input Upper DQ Mask Enable Output Lower DQ Mask Enable Output Supply Voltage Input/Output Supply Voltage Ground Input/Output Ground Not Connected Internally NC 8/23 NAND256-M, NAND512-M, NAND01G-M Figure 2. Logic Diagram: NAND Flash & 2 x SDR LPSDRAMs VDDQD VDDD VDDF 13 A0-A12 2 BA0-BA1 EF R WF AL CL WP K KE E0D E1D WD RAS CAS RB NAND256-M NAND512-M NAND01G-M I/O8-I/O15, x16 I/O0-I/O7, x8/x16 Summary description DQ0-DQ15 x16 SDR0 DQ16-DQ31 x16 SDR1 DQM0-DQM3 VSS Ai11022b 9/23 Summary description Table 3. I/O0-I/O7 AL CL EF R RB WF WP VDDF VSSF NAND256-M, NAND512-M, NAND01G-M Signal Names: NAND Flash & 2 x SDR LPSDRAMs NAND Flash Data Inputs/Outputs Address Latch Enable Command Latch Enable Chip Enable Read Enable Ready/Busy (open-drain output) Write Enable Write Protect Supply Voltage Ground SDR LPSDRAM A0-A12 BA0-BA1 DQ0-DQ15 DQ16-DQ31 K KE E0D E1D WD RAS CAS DQM0 DQM1 DQM2 DQM3 VDDD VDDQD VSSD VSSQD Row Address: RA0-RA11 Column Address: CA0-CA8 Auto-precharge flag: A10 Bank Address Data Inputs/Outputs for x16 devices SDR0 Data Inputs/Outputs for x16 devices SDR1 Clock Input Clock Enable Input Chip Select input for SDR0 Chip Select input for SDR1 Write Enable Input Row Address Strobe Input Column Address Strobe Input Lower DQ Mask Enable Output for SDR0 Upper DQ Mask Enable Output for SDR0 Lower DQ Mask Enable Output for SDR1 Upper DQ Mask Enable Output for SDR1 Supply Voltage Input/Output Supply Voltage Ground Input/Output Ground Not Connected Internally NC 10/23 NAND256-M, NAND512-M, NAND01G-M Figure 3. Logic Diagram: NAND Flash & DDR LPSDRAM VDDQD VDDD VDDF Summary description 13 A0-A12 2 BA0-BA1 EF R WF AL CL WP K K KE ED WD RAS CAS DQM0 DQM1 NAND256-M NAND512-M NAND01G-M 16 I/O0-I/O15 DQ0-DQ15 UDQS-LDQS RB VSSQD VSSD VSSF Ai11023b 11/23 Summary description Table 4. I/O0-I/O15 AL CL EF R RB WF WP VDDF VSSF NAND256-M, NAND512-M, NAND01G-M Signal Names - NAND Flash & DDR LPSDRAM NAND Flash Data Inputs/Outputs Address Latch Enable Command Latch Enable Chip Enable Read Enable Ready/Busy (open-drain output) Write Enable Write Protect Supply Voltage Ground DDR LPSDRAM A0-A12 BA0-BA1 DQ0-DQ15 UDQS-LDQS K K KE ED WD RAS CAS DQM0 DQM1 VDDD VDDQD VSSD VSSQD Address Inputs A10 determines the Precharge mode. Bank Select Inputs Data Inputs/Outputs Data Strobe Inputs/Outputs Clock Input Clock Input Clock Enable Input Chip Select inputs Write Enable Input Row Address Strobe Input Column Address Strobe Input DQ Mask Enable Input (controls DQ0-DQ7) DQ Mask Enable Input (controls DQ8-DQ15) Supply Voltage Input/Output Supply Voltage Ground Input/Output Ground Not Connected Internally Do Not Use NC DU 12/23 NAND256-M, NAND512-M, NAND01G-M Figure 4. TFBGA107 Connections (Top view through package) 1 2 3 4 5 6 7 8 Summary description 9 10 A DU DU DU B DU NC DQ0 VDDD VSSF VDDF NC A3 NC DU C VSSD DQ2 DQ1 CL EF A0 A1 A2 D VDDQD DQ4 DQ3 AL WF BA0 BA1 A10 E VSSQD DQ6 DQ5 R RB RAS NC ED F VDDQD NC DQ7 WP NC CAS WD VSSD G VSSD DQM0 NC NC NC A12 KE VDDD H VDDD DQM1 K NC NC A8 A9 A11 J VSSQD NC DQ8 I/O0 I/O2 I/O4 I/O6 A7 K VDDQD DQ9 DQ10 I/O8 I/O10 I/O12 I/O14 A6 L VSSQD DQ11 DQ12 I/O1 I/O3 I/O5 I/O7 A5 M VDDD DQ13 DQ14 I/O9 I/O11 I/O13 I/O15 A4 N DU NC DQ15 VSSD VSSF VDDF VDDF VSSF NC DU P DU DU DU DU AI10143b 13/23 Summary description Figure 5. NAND256-M, NAND512-M, NAND01G-M TFBGA149 Connections (Top view through package) 1 2 3 4 5 6 7 8 9 10 11 12 A DU DU DU DU DU DU B DU DU DU DU DU DU C DU NC NC VDDD VSSD K K VDDD VSSD I/O7 NC DU D DU NC NC A0 ED WD KE A7 A8 I/O6 I/O15 E NC RB A1 BA0 CAS A12 A6 NC I/O5 I/O14 F NC R A2 BA1 RAS A11 A5 NC I/O4 I/O13 G VSSF EF A3 A10 NC A9 A4 NC NC I/O12 H VDDF NC NC NC NC NC NC NC VSSF VDDF J NC NC NC NC NC NC NC NC NC NC K NC CL NC NC DQM0 DQM1 NC NC NC I/O11 L NC AL DQ0 DQ3 LDQS UDQS DQ10 DQ13 I/O3 I/O10 M NC WF DQ1 DQ4 DQ6 DQ8 DQ11 DQ14 I/O2 I/O9 N NC WP DQ2 DQ5 DQ7 DQ9 DQ12 DQ15 I/O1 I/O8 P DU NC NC VDDQD VSSQD VDDD VSSD VDDQD VSSD I/O0 NC DU R DU DU DU DU DU DU T DU DU DU DU DU DU AI11007b 1. Balls shaded in gray are only present for NAND + DDR devices delivered in the TFBGA149 package. 14/23 NAND256-M, NAND512-M, NAND01G-M Figure 6. Summary description LFBGA137 and TFBGA137 Connections (Top view through package) 1 2 3 4 5 6 7 8 9 10 A DU DU DU B NC NC R CL VDDF EF WF VDDD VSSD NC C VSSD A4 WP AL VSSF RB DQ31 DQ30 VDDQD VSSQD D VDDD A5 A7 A9 DQ25 DQ27 DQ29 DQ28 VSSQD VDDQD E A6 A8 KE DQ18 NC DQ22 DQM3 DQ26 VDDQD VSSQD F A12 A11 NC DQ17 DQ19 DQ24 DQ23 DQM2 VSSQD VDDQD G NC RAS DQ15 DQ16 NC DQM1 DQ9 K VDDQD VSSQD H VDDD CAS DQ20 DQ21 DQ13 DQ12 NC NC VSSQD VDDD J VSSD ED BA0 DQ14 DQ11 DQ10 NC DQM0 VSSQD VDDQD K WD BA1 A10 A0 DQ7 DQ8 DQ6 DQ4 VDDQD VSSQD L A1 A2 A3 DQ0 DQ1 DQ2 DQ3 DQ5 VDDQD VSSQD M VDDD VSSD NC NC I/O3 I/O5 NC I/O7 VSSQD VDDQD N I/O0 I/O1 I/O2 NC VDDF I/O6 NC NC VDDQD VSSQD P NC NC NC NC NC VSSF I/O4 VDDD VSSD NC R DU DU DU DU AI13146 15/23 Maximum rating NAND256-M, NAND512-M, NAND01G-M 2 Maximum rating Stressing the device above the rating listed in the Absolute Maximum Ratings table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 5. Absolute Maximum Ratings Value Symbol TA TBIAS TSTG Parameter Min Ambient Operating Temperature Temperature Under Bias Storage Temperature NAND Flash Input or Output Voltage LPSDRAM Input or Output Voltage VDDF NAND Flash Supply Voltage 3V device VDDD, VDDQD LPSDRAM Short Circuit Output Current LPSDRAM Power Dissipation LPSDRAM Supply Voltage IOS 1.8V device -0.6 -0.5 50 4.6 2.6 V V mA 1.8V device 3V device 1.8V device 1.8V device -30 TBD(1) -55 -0.6 -0.6 -0.5 -0.6 Max 85 TBD(1) 125 2.7 4.6 2.6 2.7 C C C V V V V Unit VIO(2) PD 1.0 W 1. TBD stands for To Be Defined. 2. Minimum Voltage may undershoot to -2V for less than 20ns during transitions on input and I/O pins. Maximum voltage may overshoot to VDD + 2V for less than 20ns during transitions on I/O pins. 16/23 NAND256-M, NAND512-M, NAND01G-M Package Mechanical 3 Figure 7. Package Mechanical TFBGA107 10.5x13mm - 10x14 active ball array, 0.80mm pitch, Bottom Outline D FD D1 b SE E E1 ddd BALL "B1" e FE A SD e A1 A2 BGA-Z24 1. Drawing not to scale. Table 6. Symbol TFBGA107 10.5x13mm - 10x14 active ball array, 0.80mm pitch, Mechanical Data millimeters Typ Min Max 1.20 0.25 0.80 0.45 10.50 7.20 0.10 13.00 10.40 0.80 1.65 1.30 0.40 0.40 - - 12.90 13.10 0.512 0.409 0.031 0.065 0.051 0.016 0.016 - - 0.508 0.40 10.40 0.50 10.60 0.031 0.018 0.413 0.283 0.004 0.516 0.016 0.409 0.020 0.417 0.010 Typ inches Min Max 0.047 A A1 A2 b D D1 ddd E E1 e FD FE SD SE 17/23 Package Mechanical Figure 8. NAND256-M, NAND512-M, NAND01G-M TFBGA149 10x13.5mm - 12x16 active ball array, 0.80mm pitch, Bottom Outline D D1 b SE E E1 ddd e BALL "A1" FE A FD SD e A1 A2 BGA-Z78 Table 7. Symbol TFBGA149 10x13.5mm - 12x16 active ball array, 0.80mm pitch, Mechanical Data millimeters Typ Min Max 1.200 0.250 0.800 0.450 10.000 8.800 0.100 13.500 12.000 0.800 0.600 0.750 0.400 0.400 - - - - - - 13.400 13.600 0.5315 0.4724 0.0315 0.0236 0.0295 0.0157 0.0157 - - - - - - 0.5276 0.400 9.900 0.500 10.100 0.0315 0.0177 0.3937 0.3465 0.0039 0.5354 0.0157 0.3898 0.0197 0.3976 0.0098 Typ inches Min Max 0.0472 A A1 A2 b D D1 ddd E E1 e FD FE SD SE 18/23 NAND256-M, NAND512-M, NAND01G-M Figure 9. Package Mechanical LFBGA137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- Bottom Outline D D1 FD SD e E E1 ddd BALL "B1" FE e A b A1 A2 BGA-Z83 1. Subject to change without prior notice. Table 8. Symbol LFBGA137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- Mechanical Data(1) millimeters Typ Min Max 1.40 0.25 1.00 0.45 10.50 7.20 0.10 13.00 11.20 0.80 1.65 0.90 0.40 - - 12.90 13.10 0.512 0.441 0.031 0.065 0.035 0.016 - - 0.508 0.40 10.40 0.50 10.60 0.039 0.018 0.413 0.283 0.004 0.516 0.016 0.409 0.020 0.417 0.010 Typ Min inches Max 0.055 A A1 A2 b D D1 ddd E E1 e FD FE SD 1. Subject to change without prior notice. 19/23 Package Mechanical NAND256-M, NAND512-M, NAND01G-M Figure 10. TFBGA137 10.5x13mm - 10x13 active ball array, 0.8mm pitch- Bottom Outline D D1 FD SD e E E1 ddd BALL "B1" FE e A b A1 A2 BGA-Z83 1. Subject to change without prior notice. Table 9. TFBGA137 10.5x13mm - 10x13 active ball array, 0.80mm pitch millimeters inches Max 1.20 0.25 0.80 0.45 10.50 7.20 13.00 11.20 0.80 1.65 0.90 0.40 - - - - 12.90 13.10 0.40 10.40 0.50 10.60 0.031 0.018 0.413 0.283 0.512 0.441 0.031 0.065 0.035 0.016 - - - - 0.508 0.516 0.016 0.409 0.020 0.417 0.010 Typ Min Max 0.047 Symbol Typ A A1 A2 b D D1 E E1 e FD FE SD Min 20/23 NAND256-M, NAND512-M, NAND01G-M Part Numbering 4 Table 10. Example: Part Numbering Ordering Information Scheme NAND256 R 3 M 4 A ZB 5 E Device Type NAND Flash Memory NAND Flash Density 256 = 256Mb 512 = 512Mb 01G = 1Gb Operating Voltage R = VDDF = 1.7V to 1.95V W = VDDF = 2.5V to 3.6V NAND Bus Width 3 = x8 4 = x16 Family Identifier M = 528 Byte Page NAND Flash + LPSDRAM Device Options 0 = 256, x16, 104MHz, SDR, BGA107 2 = 2 x 256, 2x16, 104MHz, SDR, BGA137 or 512, x32, 133MHz, SDR, BGA137 3 = 256, x16, 133MHz, DDR BGA149 4 = 256, x16, 104MHz, SDR, BGA149 5 = 512, x16, 133MHz, DDR, BGA149 Product Version A B C Package ZB = TFBGA ZC = LFBGA Temperature range 5 = -30c to 85C Option E = ECOPACK Package, Standard Packing F = ECOPACK Package, Tape & Reel Packing Devices are shipped from the factory with the Flash memory content bits, in valid blocks, erased to '1'. For further information on any aspect of this device, please contact your nearest ST Sales Office. 21/23 Revision history NAND256-M, NAND512-M, NAND01G-M 5 Revision history Table 11. Date 06-Feb-2006 09-Feb-2006 07-Apr-2006 Document Revision History Version 1.0 2.0 3 First Issue. Reference M65KG256AD changed to M65KG256AB. Part numbers NAND512R4M3 and NAND512R4M5 added, corresponding to 1 die of 512 Mb (x16) NAND Flash + 1 die of 256 Mb or 512 Mb (x16) DDR LPSDRAM. Temperature range -25 to 85C removed for 512 Mbit LPSDRAMs. NAND512W3M2 part number added in Table 1: Product List. Figure 5: TFBGA149 Connections (Top view through package) updated. LPSDRAM supply voltage changed to 1.7 to 1.9V. 1 Gbit (x8) 3V NAND Flash memory and 512Mbit SDR (x32) 1.8V, 133MHz LPSDRAM added for NAND01GW3M2. TFBGA137 package added. Revision Details 23-May-2006 4 24-Aug-2006 5 22/23 NAND256-M, NAND512-M, NAND01G-M Please Read Carefully: Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any time, without notice. All ST products are sold pursuant to ST's terms and conditions of sale. Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no liability whatsoever relating to the choice, selection or use of the ST products and services described herein. No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such third party products or services or any intellectual property contained therein. UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZED ST REPRESENTATIVE, ST PRODUCTS ARE NOT RECOMMENDED, AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS, NOR IN PRODUCTS OR SYSTEMS WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE. ST PRODUCTS WHICH ARE NOT SPECIFIED AS "AUTOMOTIVE GRADE" MAY ONLY BE USED IN AUTOMOTIVE APPLICATIONS AT USER'S OWN RISK. Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any liability of ST. ST and the ST logo are trademarks or registered trademarks of ST in various countries. Information in this document supersedes and replaces all information previously supplied. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. (c) 2006 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America www.st.com 23/23 |
Price & Availability of NAND01G-M
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |